Integrated fuse devices have been employed in semiconductor integrated circuits for many years for a wide variety of purposes. The main purpose of a fuse device is to act a conductive pathway until it is “blown”.
Historically, integrated fuse devices have involved patterned metal conductive links that can be selectively “blown” or cut with a laser beam or by passing a large current through them. This process causes a portion of the link material to vaporize and a portion to melt, in much the same manner as an automotive fuse, but on a much smaller scale. Once blown the fuse changes from a highly conductive state to a highly resistive (i.e., non-conductive) state.
A blown fuse inhibits current from flowing through and represents an open circuit to the current path. However, if the conductive fuse link material is not sufficiently dispersed within the surrounding area, conductive debris or “fallout” from the “blow” process may still represent a conductive path even after the fuse device is blown. In other words, especially with electrically blown fuses, the fuse “blow” may sometimes be unreliable. To deal with this possibility, cavities or areas of adsorption material are often provided around the fuse link material to provide a harmless place for the melted and vaporized material to disperse. U.S. Pat. No. 5,903,041 by Fleur, et al. (hereinafter “FLEUR”) is an example of such a technique. FLEUR describes a two-terminal fuse-antifuse device with an air gap for receiving debris from the “blow” process, and for thermally isolating the fuse-antifuse from BEOL (back end of line) dielectrics. The thermal isolation of FLEUR helps to prevent heat transfer to the BEOL dielectrics during the “blow” process, thereby limiting stress.
Generally speaking, the “blown” condition of a fuse device is permanent and irreversible —and is intended as such. Integrated fuse devices are inherently “nonvolatile,” that is, their condition is not lost when the integrated circuit is powered down. This nonvolatile characteristic was employed in one of the earlier applications of integrated fuse devices: the fusible link PROM (programmable read only memory) in which the blown and un-blown conditions of the individual fuse devices in an array were used to represent the individual one and zero states stored in a user programmable memory device.
One notable variation on the theme of fuse devices is the “antifuse” that performs the opposite function of a fuse. An antifuse is a normally open device that can be irreversibly “un-blown” to become conductive. Whereas a fuse starts with a low resistance and is designed to permanently break an electrically conductive path, an antifuse starts with a high resistance and is designed to permanently create an electrically conductive path. ICs that use antifuse technology often employ a thin barrier of non-conducting amorphous silicon between two metal conductors. When a sufficiently high voltage is applied across the amorphous silicon it is turned into a polycrystalline silicon-metal alloy (silicide) with a low resistance, thereby forming a conductive link.
The conductive pathway provided by an “un-blown” fuse device can be employed in almost any way a “normal” conductor can be employed: to carry power to a circuit; to provide a bypass connection around a circuit or to connect one area of circuitry to another; to provide “hard” logic levels (e.g., the aforementioned PROM application); and many other ways.
Electronic systems often require functions to be enabled, disabled or modified after semiconductor chips used in the electronic systems have been manufactured. For example, a common chip may be designed to serve multiple applications, the chip originally having circuitry to support all of the multiple applications. After manufacture of the chip, integrated fuse devices can be blown to personalize the chip for a particular specific application.
By way of further example, integrated circuit chips will sometimes contain imperfections that render portions of the chip unusable. A computer processor chip may be designed to have a 128 KB (kilobyte) cache, but in-process testing may determine that only 64 KB of the 128 KB is functional. If the remainder of the chip is functional, the chip may still be used, but information must be stored on the chip so that no attempt to use the nonfunctional 64 KB portion of the 128 KB cache is performed.
In yet another example, static charges built up during certain processing steps in the fabrication and processing of dynamic random access memory (DRAM) circuits put sensitive transistor gate stacks at risk of damage. To protect the gate stacks, one or more integrated fuse devices may be employed during manufacturing to create protective current pathways that conduct these charges harmlessly away. At a later point in the fabrication process when the risk of damage no longer exists, the fuses can be blown or cut to permit the finished DRAM circuit to function normally.
One approach to dealing with yield problems in large arrays is the use of redundant circuit elements. Redundancy has been employed on memory chips for many years in order to increase yield. When a defective cell (or collection of cells) is identified through chip testing, its address is typically recorded in nonvolatile memory. This non-volatile memory is typically implemented as an array of laser-blown fuses on the chip. Subsequently, whenever the defective address is accessed, the fuses and associated redundancy logic cause redundant cells to be accessed instead of the defective cells. As integration density has increased, the use of this kind of redundancy logic with large static arrays has become commonplace in advanced chip designs. On some recent integrated circuit designs, memory has been integrated with logic to such an extent that redundancy involving hundreds or thousands of fuse devices has been employed to ensure adequate chip yield. Some of these chips have also employed fuse devices to provide electronic chip ID, or EID.
A more recent development in integrated fuse technology is the “eFUSE” device, in which “blowing” the fuse does not involve a physical rupture of a fuse element, but where a silicide conductive element is caused to thin out or disperse by electromigration, greatly increasing its resistance. The fuse is “blown” by applying a higher than nominal voltage. eFUSE devices provide several compelling advantages over the laser fuses they have replaced. The blow process does not risk damage to adjacent devices. eFUSEs can be blown by a logic process instead of a physical laser ablation method. eFUSEs are substantially smaller than laser fuses, and they scale better with process improvements. Finally, since no specialized equipment or separate product flow is required, eFUSEs can be blown at multiple test and application stages. We discuss circuit design, fuse programming, test considerations, and z9e system applications. The physical and logical implementation of eFUSEs has resulted in improved yield at wafer, module, and final assembly test levels, and has provided additional flexibility in logic function and in system use.
On modern semiconductor chips, fuse devices are often provided in the form of “eFUSEs” or electronically programmable fuses. As a fuse device, an eFUSE is electronically programmable, and may be programmed by blowing the eFUSE after a chip is manufactured. In some applications, the eFUSE is blown even after an electronic system utilizing the chip has been in operation for some time.
An eFUSE typically comprises a silicide conductive link on a silicon or polysilicon beam. Silicide has been widely used in semiconductor products to provide low-resistance conductors, typically in the gate, source or drain regions of integrated Field Effect Transistors (FETs). An eFUSE is blown by directing a current of sufficient magnitude and duration through the eFUSE to cause diffusion of the silicide material by electromigration. This effectively “thins” the silicide concentration in the conductive link, thereby increasing its electrical resistance. Descriptions of eFUSEs can be found in U.S. Pat. No. 6,368,902, “Enhanced eFUSEs by the local degradation of the fuse link”, by Chandrasekharan Kothandaraman, et al (hereinafter referred to as “KOTHANDARAMAN 902”), and U.S. Pat. No. 6,624,499, “System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient”, by Chandrasekharan Kothandaraman, et al. (hereinafter referred to as “KOTHANDARAMAN 499”), both of which are incorporated herein by reference.
Integrated eFUSE devices have several advantages over conventional integrated fuse devices. The electromigration programming technique employed with eFUSE devices does not produce vaporized or molten “fallout,” resulting in minimal risk of damage to adjacent structures. As a result, eFUSE density can be quite high compared to conventional metallic fusible links. Further, eFUSEs can be blown using considerably less energy than conventional fuses, and require less thermal isolation.
eFUSE programming by silicide electromigration is dependent upon the diffusion of silicide, which is greatly dependent upon temperature. Present eFUSE devices typically lie on STI (shallow trench isolation) oxide, which provides reasonably good thermal isolation of the fuse device (compared to other materials in the chip), but which is still thermally conductive enough to present challenging tradeoffs in choosing the appropriate amount of thermal energy to use in blowing the EFUSE. While thermal isolation is less critical for eFUSE devices than for conventional fusible links, the amount of energy required to raise the temperature of the eFUSE silicide to cause predictable, reliable electromigration depends greatly upon the thermal conductivity of the materials on which the eFUSE is built.